Research @ IT

 

SAW Device Design

Project and Design of the SAW devices, with the help of JISIS Simulator.

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Characterization of the SAW Devices

Characterization of the devices to check the centre frequency and other important aspects.

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Electronics Design

Electronics design to measure changes in SAW velocity.

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  • About

    • JISIS (PTDC/EEA-TEL/104004/2008) is a project funded by the portuguese Foundation for Science and Technology (FCT), with collaboration of the Institute of Telecommunications of Aveiro (IT) and Centre of Mechanical Technology and Automation (TEMA).

  • Links

    • IT - Instituto de Telecomunicações
    • UA - Universidade de Aveiro
    • FCT - Fundação para a Ciência e Tecnologia